Cyclone V
E665366
Cyclone V is a family of Intel (formerly Altera) mid-range FPGAs designed for cost-effective, low-power programmable logic applications.
All labels observed (7)
| Label | Occurrences |
|---|---|
| Cyclone V canonical | 2 |
| Cyclone V E | 1 |
| Cyclone V GT | 1 |
| Cyclone V GX | 1 |
| Cyclone V SE | 1 |
| Cyclone V SX | 1 |
| Intel Cyclone FPGA families | 1 |
How this entity was disambiguated
This entity first appeared as the object of triple T7388026 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: Cyclone V Context triple: [Cyclone, familyMember, Cyclone V]
-
A.
Cyclone IV
Cyclone IV is a family of low-cost, low-power FPGA devices from Intel (formerly Altera) designed for high-volume, cost-sensitive applications.
-
B.
Cyclone II
Cyclone II is a family of Altera (now Intel) FPGA devices designed as a successor to the original Cyclone series, offering higher performance and greater logic density for cost-sensitive applications.
-
C.
Cyclone III
Cyclone III is a low-power, high-density FPGA family from Altera (now Intel) designed for cost-sensitive and portable applications.
-
D.
Arria 10
Arria 10 is an Intel (formerly Altera) mid-range FPGA family known for its high performance, power efficiency, and suitability for signal processing, networking, and embedded computing applications.
-
E.
Stratix
Stratix is a high-performance family of field-programmable gate arrays (FPGAs) designed by Altera (now part of Intel) for demanding digital logic and signal processing applications.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: Cyclone V Target entity description: Cyclone V is a family of Intel (formerly Altera) mid-range FPGAs designed for cost-effective, low-power programmable logic applications.
-
A.
Cyclone IV
Cyclone IV is a family of low-cost, low-power FPGA devices from Intel (formerly Altera) designed for high-volume, cost-sensitive applications.
-
B.
Cyclone II
Cyclone II is a family of Altera (now Intel) FPGA devices designed as a successor to the original Cyclone series, offering higher performance and greater logic density for cost-sensitive applications.
-
C.
Cyclone III
Cyclone III is a low-power, high-density FPGA family from Altera (now Intel) designed for cost-sensitive and portable applications.
-
D.
Arria 10
Arria 10 is an Intel (formerly Altera) mid-range FPGA family known for its high performance, power efficiency, and suitability for signal processing, networking, and embedded computing applications.
-
E.
Stratix
Stratix is a high-performance family of field-programmable gate arrays (FPGAs) designed by Altera (now part of Intel) for demanding digital logic and signal processing applications.
- F. None of above. chosen
Statements (48)
| Predicate | Object |
|---|---|
| instanceOf |
FPGA family
ⓘ
programmable logic device family ⓘ |
| acquiredBy |
Intel (through acquisition of Altera)
ⓘ
linked to:
Altera
|
| architectureFamily | Cyclone FPGA series ⓘ |
| configurationMethod |
supports configuration via JTAG
ⓘ
supports configuration via serial configuration devices ⓘ |
| designGoal |
cost-effective programmable logic
ⓘ
low-power operation ⓘ |
| embeddedMemory | up to several Mbits of embedded memory (approximate) ⓘ |
| formerManufacturer | Altera ⓘ |
| hasFeature |
embedded DSP blocks
ⓘ
embedded hard memory controllers ⓘ fractional PLLs ⓘ hard PCI Express blocks (in some variants) ⓘ hard memory interfaces ⓘ high-speed transceivers (in GX/GT variants) ⓘ integrated ARM-based hard processor system (in SoC variants) ⓘ phase-locked loops (PLLs) ⓘ |
| hasSubfamily |
Cyclone V E
ⓘ
linked to:
Cyclone V
Cyclone V GT ⓘ
linked to:
Cyclone V
Cyclone V GX ⓘ
linked to:
Cyclone V
Cyclone V SE ⓘ
linked to:
Cyclone V
Cyclone V SX ⓘ
linked to:
Cyclone V
|
| integratedCPU |
ARM Cortex-A9 MPCore (in SoC variants)
ⓘ
linked to:
ARM Cortex-A
|
| introducedBy | Altera before Intel acquisition ⓘ |
| ioStandardSupport | supports a wide range of single-ended and differential I/O standards ⓘ |
| logicElementRange | 25000 to 301000 logic elements (approximate) ⓘ |
| manufacturer |
Intel
ⓘ
linked to:
Intel Corporation
|
| marketPosition |
cost-optimized FPGA
ⓘ
low-power FPGA ⓘ |
| packageOptions | available in multiple BGA packages ⓘ |
| powerOptimization | supports multiple power-saving modes ⓘ |
| processNode | 28 nm ⓘ |
| productLineOf | Intel PSG ⓘ |
| productRange | mid-range FPGA ⓘ |
| successorOf | Cyclone IV ⓘ |
| supportsStandard |
DDR3 SDRAM interfaces
ⓘ
Gigabit Ethernet MAC (via soft or hard IP) ⓘ LPDDR2 interfaces (device-dependent) ⓘ PCI Express (device-dependent) ⓘ |
| toolchain |
Altera Quartus II (historical)
ⓘ
linked to:
Quartus design software
Intel Quartus Prime ⓘ
linked to:
Quartus design software
|
| typicalApplication |
automotive driver assistance (ADAS) systems
ⓘ
broadcast and professional video ⓘ embedded vision ⓘ industrial control ⓘ motor control ⓘ wireless infrastructure ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
Instruction
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Input
Subject: Cyclone V Description of subject: Cyclone V is a family of Intel (formerly Altera) mid-range FPGAs designed for cost-effective, low-power programmable logic applications.
Referenced by (8)
Full triples — surface form annotated when it differs from this entity's canonical label.
linked to: Cyclone V
linked to: Cyclone V
linked to: Cyclone V
linked to: Cyclone V
linked to: Cyclone V
linked to: Cyclone V