Intel Core 2
E654591
Intel Core 2 is a family of 64-bit x86 microprocessors by Intel that introduced a new Core microarchitecture focused on improved performance and energy efficiency over the Pentium 4 line.
All labels observed (15)
| Label | Occurrences |
|---|---|
| Intel Core 2 Duo | 3 |
| Intel Core 2 canonical | 2 |
| Core 2 Duo | 1 |
| Core 2 Extreme | 1 |
| Core 2 Quad | 1 |
| Core 2 Solo | 1 |
| Intel Core 2 (Penryn) | 1 |
| Intel Core 2 Duo (mobile) | 1 |
| Intel Core 2 Duo processors | 1 |
| Intel Core 2 Quad | 1 |
| Intel Core 2 Quad processors | 1 |
| Intel Core 2 processor family | 1 |
| Intel Core 2 processors | 1 |
| Intel Merom | 1 |
| competed with Intel Core 2 Quad | 1 |
How this entity was disambiguated
This entity first appeared as the object of triple T7304696 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
Target entity: Intel Core 2 Context triple: [SSSE3, firstSupportedProcessorFamily, Intel Core 2]
-
A.
Pentium 4
Pentium 4 is a line of Intel x86 microprocessors introduced in 2000, known for its NetBurst microarchitecture, high clock speeds, and use in mainstream desktop PCs.
-
B.
Intel Core Duo
Intel Core Duo is a line of Intel dual-core mobile processors designed to improve multitasking performance and energy efficiency in laptops.
-
C.
Intel Pentium M
Intel Pentium M is a family of mobile x86 processors introduced by Intel in the early 2000s, designed for low power consumption and high performance in laptops and forming the architectural basis for later Core-series CPUs.
-
D.
Nehalem microarchitecture
Nehalem microarchitecture is Intel’s processor design introduced in 2008 that marked a major shift to integrated memory controllers, QuickPath Interconnect, and advanced performance features for Core i7 and Xeon CPUs.
-
E.
Intel 7
Intel 7 is Intel’s advanced semiconductor process node used to fabricate modern CPU microarchitectures like Gracemont, offering improved performance and power efficiency over previous generations.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
Target entity: Intel Core 2 Target entity description: Intel Core 2 is a family of 64-bit x86 microprocessors by Intel that introduced a new Core microarchitecture focused on improved performance and energy efficiency over the Pentium 4 line.
-
A.
Pentium 4
Pentium 4 is a line of Intel x86 microprocessors introduced in 2000, known for its NetBurst microarchitecture, high clock speeds, and use in mainstream desktop PCs.
-
B.
Intel Core Duo
Intel Core Duo is a line of Intel dual-core mobile processors designed to improve multitasking performance and energy efficiency in laptops.
-
C.
Intel Pentium M
Intel Pentium M is a family of mobile x86 processors introduced by Intel in the early 2000s, designed for low power consumption and high performance in laptops and forming the architectural basis for later Core-series CPUs.
-
D.
Nehalem microarchitecture
Nehalem microarchitecture is Intel’s processor design introduced in 2008 that marked a major shift to integrated memory controllers, QuickPath Interconnect, and advanced performance features for Core i7 and Xeon CPUs.
-
E.
Intel 7
Intel 7 is Intel’s advanced semiconductor process node used to fabricate modern CPU microarchitectures like Gracemont, offering improved performance and power efficiency over previous generations.
- F. None of above. chosen
Statements (48)
| Predicate | Object |
|---|---|
| instanceOf | microprocessor family ⓘ |
| architecture | Intel Core microarchitecture ⓘ |
| bitWidth | 64-bit ⓘ |
| cacheType | L2 cache ⓘ |
| codenameFamily | Allendale ⓘ |
| codenameFamily |
Conroe
ⓘ
Kentsfield ⓘ Merom ⓘ Penryn ⓘ Yorkfield ⓘ |
| coreCountRange | 1–4 cores ⓘ |
| designGoal |
improved energy efficiency
ⓘ
improved performance ⓘ |
| familyIncludes |
Core 2 Duo
ⓘ
linked to:
Intel Core 2
Core 2 Extreme ⓘ
linked to:
Intel Core 2
Core 2 Quad ⓘ
linked to:
Intel Core 2
Core 2 Solo ⓘ
linked to:
Intel Core 2
|
| ISA |
x86
ⓘ
x86-64 ⓘ
linked to:
AMD64 architecture
|
| launchDate | July 2006 ⓘ |
| manufacturer |
Intel
ⓘ
linked to:
Intel Corporation
|
| marketSegment |
desktop computers
ⓘ
mobile computers ⓘ servers ⓘ |
| notableFeature |
higher instructions per clock than NetBurst
ⓘ
lower power consumption than Pentium 4 ⓘ shared L2 cache in multi-core models ⓘ |
| predecessor |
Pentium 4
ⓘ
Pentium D ⓘ
linked to:
Intel Pentium D
|
| processNode |
45 nm
ⓘ
65 nm ⓘ |
| socketCompatibility |
LGA 775
ⓘ
Socket M ⓘ Socket P ⓘ |
| successor |
Intel Core i3
ⓘ
Intel Core i5 ⓘ Intel Core i7 ⓘ
linked to:
Intel Core processor family
|
| supports |
Enhanced Intel SpeedStep Technology
ⓘ
linked to:
Intel SpeedStep
Intel 64 ⓘ Intel EM64T ⓘ
linked to:
Intel 64
Intel VT-x ⓘ Intel XD bit ⓘ SSE3 ⓘ SSE4.1 ⓘ SSSE3 ⓘ |
| targetUse |
business PCs
ⓘ
consumer PCs ⓘ entry-level servers ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Subject: Intel Core 2 Description of subject: Intel Core 2 is a family of 64-bit x86 microprocessors by Intel that introduced a new Core microarchitecture focused on improved performance and energy efficiency over the Pentium 4 line.
Referenced by (18)
Full triples — surface form annotated when it differs from this entity's canonical label.