OpenOCD for RISC-V
E193756
OpenOCD for RISC-V is a customized version of the Open On-Chip Debugger that provides hardware debugging, programming, and testing support for RISC-V processors and development boards.
All labels observed (2)
| Label | Occurrences |
|---|---|
| OpenOCD | 1 |
| OpenOCD for RISC-V canonical | 1 |
How this entity was disambiguated
This entity first appeared as the object of triple T1717943 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: OpenOCD for RISC-V Context triple: [RISC-V, hasDebugSupport, OpenOCD for RISC-V]
-
A.
RISC-V
RISC-V is an open, extensible instruction set architecture (ISA) based on the reduced instruction set computing (RISC) principles, widely used for research, embedded systems, and increasingly general-purpose computing.
-
B.
GDB remote serial protocol
The GDB remote serial protocol is a communication protocol that allows the GNU Debugger to control and inspect programs running on a separate target system over a serial or TCP connection.
-
C.
Calliope mini
Calliope mini is a small educational microcontroller board designed to teach children and beginners programming and electronics through interactive projects.
-
D.
Bytecode Alliance
Bytecode Alliance is a nonprofit industry consortium focused on advancing secure, modular, and portable software through technologies built around WebAssembly.
-
E.
IEEE 1149.6
IEEE 1149.6 is a boundary-scan test standard that extends JTAG to support structural testing of high-speed AC-coupled and differential digital interconnects on printed circuit boards.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: OpenOCD for RISC-V Target entity description: OpenOCD for RISC-V is a customized version of the Open On-Chip Debugger that provides hardware debugging, programming, and testing support for RISC-V processors and development boards.
-
A.
RISC-V
RISC-V is an open, extensible instruction set architecture (ISA) based on the reduced instruction set computing (RISC) principles, widely used for research, embedded systems, and increasingly general-purpose computing.
-
B.
GDB remote serial protocol
The GDB remote serial protocol is a communication protocol that allows the GNU Debugger to control and inspect programs running on a separate target system over a serial or TCP connection.
-
C.
Calliope mini
Calliope mini is a small educational microcontroller board designed to teach children and beginners programming and electronics through interactive projects.
-
D.
Bytecode Alliance
Bytecode Alliance is a nonprofit industry consortium focused on advancing secure, modular, and portable software through technologies built around WebAssembly.
-
E.
IEEE 1149.6
IEEE 1149.6 is a boundary-scan test standard that extends JTAG to support structural testing of high-speed AC-coupled and differential digital interconnects on printed circuit boards.
- F. None of above. chosen
Statements (51)
| Predicate | Object |
|---|---|
| instanceOf |
debugging software
ⓘ
on-chip debugger ⓘ open-source software ⓘ |
| basedOn |
OpenOCD
ⓘ
linked to:
OpenOCD for RISC-V
|
| compatibleWith |
GDB
ⓘ
RISC-V cores ⓘ RISC-V development boards ⓘ |
| configurationMechanism |
Tcl-like configuration scripts
ⓘ
board configuration files ⓘ target configuration files ⓘ |
| integratesWith |
RISC-V GCC toolchain
ⓘ
linked to:
GNU toolchain
RISC-V GDB ⓘ
linked to:
GDB remote serial protocol
|
| license | GNU General Public License ⓘ |
| programmingLanguage | C ⓘ |
| providesFunction |
boundary scan testing
ⓘ
flash programming ⓘ hardware debugging ⓘ |
| softwareGenre | embedded systems development tool ⓘ |
| supportsArchitecture | RISC-V ⓘ |
| supportsFeature |
JTAG interface
ⓘ
SWD-like debug transport for RISC-V (where implemented) ⓘ breakpoints ⓘ flash memory programming ⓘ memory access ⓘ register access ⓘ run-control debugging ⓘ single-stepping ⓘ watchpoints ⓘ |
| supportsInterface |
CMSIS-DAP compatible probes (where supported by OpenOCD)
ⓘ
FTDI-based JTAG adapters ⓘ USB JTAG adapters (via OpenOCD drivers) ⓘ |
| supportsOperation |
erase flash
ⓘ
halt CPU ⓘ program on-chip flash ⓘ read memory ⓘ read registers ⓘ reset CPU ⓘ set hardware breakpoints ⓘ set software breakpoints ⓘ step CPU ⓘ verify flash contents ⓘ write memory ⓘ write registers ⓘ |
| supportsStandard | RISC-V debug specification ⓘ |
| targetDomain |
RISC-V SoCs
ⓘ
linked to:
RISC-V
RISC-V microcontrollers ⓘ embedded systems ⓘ |
| useCase |
RTOS debugging on RISC-V
ⓘ
bare-metal firmware debugging ⓘ board bring-up for RISC-V hardware ⓘ |
| usesProtocol | GDB remote serial protocol ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
Instruction
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Input
Subject: OpenOCD for RISC-V Description of subject: OpenOCD for RISC-V is a customized version of the Open On-Chip Debugger that provides hardware debugging, programming, and testing support for RISC-V processors and development boards.
Referenced by (2)
Full triples — surface form annotated when it differs from this entity's canonical label.
linked to: OpenOCD for RISC-V