Design Ware Clock Management IP
GPTKB entity
Statements (53)
| Predicate | Object |
|---|---|
| gptkbp:instance_of |
gptkb:tower
|
| gptkbp:bfsLayer |
6
|
| gptkbp:bfsParent |
gptkb:Synopsys_IP_Group
|
| gptkbp:awarded_by |
Synopsys verification tools
|
| gptkbp:character_customization |
Specific application needs
|
| gptkbp:developed_by |
gptkb:Synopsys
|
| gptkbp:enables |
Clock gating
Dynamic frequency scaling |
| gptkbp:features |
High performance
Low power operation |
| https://www.w3.org/2000/01/rdf-schema#label |
Design Ware Clock Management IP
|
| gptkbp:includes |
Phase-Locked Loops (PL Ls)
Clock dividers Clock multiplexers |
| gptkbp:is_available_in |
Various configurations
|
| gptkbp:is_compatible_with |
Industry standards
Various process technologies |
| gptkbp:is_designed_for |
High-speed applications
Low-power applications |
| gptkbp:is_integrated_with |
Other Design Ware I Ps
|
| gptkbp:is_optimized_for |
gptkb:benchmark
Power efficiency |
| gptkbp:is_part_of |
gptkb:Design_Ware_Library
Integrated circuit design flow |
| gptkbp:is_recognized_for |
Robust performance
Flexibility in design Innovative design features |
| gptkbp:is_scalable |
Different design sizes
|
| gptkbp:is_supported_by |
Technical documentation
User guides Reference designs |
| gptkbp:is_used_in |
gptkb:XMPP_Extension_Protocol
gptkb:Telecommunications_company Consumer electronics Medical devices Mobile devices Automotive applications Industrial applications Aerospace applications FPGA designs ASIC designs |
| gptkbp:is_utilized_in |
System architects
Design engineers Chip designers |
| gptkbp:marketed_as |
A reliable clock management solution
|
| gptkbp:provides |
Clock synchronization
Clock distribution Clock generation Jitter performance |
| gptkbp:supports |
Multiple clock domains
Multiple output frequencies Programmable clock outputs |
| gptkbp:used_in |
System on Chip (So C) designs
|