Complex Instruction Set Computing (CISC)
GPTKB entity
Statements (33)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:architecture
|
| gptkbp:abbreviation |
CISC
|
| gptkbp:advantage |
more complex hardware
potentially slower clock speeds harder to pipeline smaller program size |
| gptkbp:category |
gptkb:architecture
|
| gptkbp:contrastsWith |
RISC has simpler instructions
|
| gptkbp:developedBy |
1970s
|
| gptkbp:example |
gptkb:x86_architecture
gptkb:VAX_architecture gptkb:System/360_architecture |
| gptkbp:feature |
variable-length instructions
complex instructions large number of instructions multiple addressing modes |
| gptkbp:focus |
hardware implementation of complex instructions
|
| gptkbp:goal |
reduce number of instructions per program
|
| gptkbp:influencedBy |
early compiler technology
|
| gptkbp:instructionSet |
hundreds of instructions
variable instruction length |
| gptkbp:opposedBy |
gptkb:Reduced_Instruction_Set_Computing_(RISC)
|
| gptkbp:type |
complex addressing modes
memory-to-memory operations single instruction can perform multiple low-level operations |
| gptkbp:usedBy |
gptkb:DEC_VAX
gptkb:IBM_System/360 gptkb:Intel_x86_processors |
| gptkbp:usedIn |
mainframes
personal computers |
| gptkbp:bfsParent |
gptkb:Reduced_Instruction_Set_Computing_(RISC)
|
| gptkbp:bfsLayer |
7
|
| https://www.w3.org/2000/01/rdf-schema#label |
Complex Instruction Set Computing (CISC)
|