gptkbp:instanceOf
|
gptkb:architecture
|
gptkbp:basedOn
|
capability-based security
|
gptkbp:category
|
gptkb:microprocessor
computer security
hardware security
memory safety
|
gptkbp:developedBy
|
gptkb:SRI_International
gptkb:University_of_Cambridge
|
gptkbp:firstPublished
|
2010
|
gptkbp:fullName
|
gptkb:Capability_Hardware_Enhanced_RISC_Instructions
|
gptkbp:fundedBy
|
gptkb:DARPA
gptkb:UK_Research_and_Innovation
|
https://www.w3.org/2000/01/rdf-schema#label
|
CHERI
|
gptkbp:notablePerson
|
gptkb:Peter_G._Neumann
gptkb:Michael_Roe
gptkb:Jonathan_Woodruff
gptkb:Simon_W._Moore
gptkb:Robert_N._M._Watson
gptkb:Brooks_Davis
|
gptkbp:notableProject
|
gptkb:Arm_Morello_board
gptkb:CHERI-MIPS
gptkb:CheriBSD
gptkb:CHERI-RISC-V
|
gptkbp:notablePublication
|
gptkb:CHERI:_A_Hybrid_Capability-System_Architecture_for_Scalable_Software_Compartmentalization_(2019)
gptkb:The_CHERI_capability_model:_Revisiting_RISC_in_an_age_of_risk_(2014)
|
gptkbp:openSource
|
true
|
gptkbp:purpose
|
enable fine-grained memory protection
improve computer security
|
gptkbp:supports
|
fine-grained compartmentalization
spatial memory safety
temporal memory safety
|
gptkbp:usedIn
|
gptkb:Arm_Morello
gptkb:MIPS
gptkb:RISC-V
|
gptkbp:website
|
https://www.cl.cam.ac.uk/research/security/ctsrd/cheri/
|
gptkbp:bfsParent
|
gptkb:Centre_for_Higher_Education_Research_and_Innovation_(CHERI)
|
gptkbp:bfsLayer
|
6
|