|
gptkbp:instance_of
|
gptkb:microprocessor
|
|
gptkbp:bfsLayer
|
5
|
|
gptkbp:bfsParent
|
gptkb:Athlon
gptkb:Sempron_processors
gptkb:Athlon_series
gptkb:Sempron
gptkb:Athlon_XP_processors
gptkb:Athlon_processors
gptkb:AMD_Athlon_64_X2
|
|
gptkbp:architectural_style
|
x86-64
|
|
gptkbp:cache_size
|
1 MB L2 cache
up to 1 MB
512 KB L1 cache
|
|
gptkbp:competitors
|
gptkb:Intel_Pentium_4
gptkb:Intel_Core_2_Duo
|
|
gptkbp:end_of_life
|
gptkb:2006
|
|
gptkbp:events
|
AM D64 launch
|
|
gptkbp:first_generation
|
gptkb:Athlon_64_X2
|
|
gptkbp:graphics
|
depends on GPU
|
|
https://www.w3.org/2000/01/rdf-schema#label
|
Athlon 64
|
|
gptkbp:hyper_threading
|
gptkb:battle
|
|
gptkbp:language_of_instruction
|
x86-64
AM D64
SS E2
SS E3
|
|
gptkbp:legacy
|
32-bit applications
|
|
gptkbp:manufacturer
|
gptkb:AMD
|
|
gptkbp:market
|
$417
|
|
gptkbp:market_segment
|
gptkb:mobile
gptkb:server
desktop
|
|
gptkbp:notable_feature
|
Low power consumption
64-bit architecture
Enhanced performance
Integrated memory controller
Hyper Transport technology
|
|
gptkbp:number_of_cores
|
gptkb:Venice
gptkb:San_Diego
gptkb:Newcastle
gptkb:Winchester
gptkb:Orleans
1 to 4
Clawhammer
|
|
gptkbp:overclocking_support
|
high
|
|
gptkbp:performance
|
64-bit computing
|
|
gptkbp:power_consumption
|
variable
|
|
gptkbp:produced_by
|
gptkb:AMD
130 nm
90 nm
|
|
gptkbp:ram
|
gptkb:battle
|
|
gptkbp:release_year
|
gptkb:2003
|
|
gptkbp:released
|
September 23, 2003
|
|
gptkbp:socket_type
|
gptkb:Socket_939
gptkb:Socket_754
|
|
gptkbp:successor
|
gptkb:Athlon_64_X2
gptkb:Athlon_II
|
|
gptkbp:supports
|
gptkb:CEO
DD R2 SDRAM
|
|
gptkbp:tdp
|
up to 65 W
up to 89 W
|
|
gptkbp:transportation
|
gptkb:battle
|