Triple

T8036113
Position Surface form Disambiguated ID Type / Status
Subject ACM-IEEE Eckert-Mauchly Award E187111 entity
Predicate notableRecipient P108 FINISHED
Object Yale Patt
Yale Patt is an American computer engineer and professor renowned for his pioneering contributions to microprocessor architecture and instruction-level parallelism.
E724700 NE FINISHED

How this triple was built (4 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: Yale Patt | Statement: [ACM-IEEE Eckert-Mauchly Award, notableRecipient, Yale Patt]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07
Target entity: Yale Patt
Context triple: [ACM-IEEE Eckert-Mauchly Award, notableRecipient, Yale Patt]
  • A. David A. Patterson
    David A. Patterson is a pioneering American computer scientist best known for his work on RISC architecture, RAID storage, and influential computer architecture textbooks.
  • B. Norman P. Jouppi
    Norman P. Jouppi is a prominent computer architect known for his influential work in processor and memory system design, including leadership roles in industry and contributions to advanced CPU technologies.
  • C. John Cocke
    John Cocke was an influential American computer scientist and IBM researcher, often called the "father of RISC architecture" for his pioneering work in reduced instruction set computing and compiler optimization.
  • D. John L. Hennessy
    John L. Hennessy is an American computer scientist and academic leader, former president of Stanford University, and a pioneer in RISC processor architecture.
  • E. Federico Faggin
    Federico Faggin is an Italian-American physicist, engineer, and inventor best known for leading the development of the first commercial microprocessor and pioneering work in semiconductor technology.
  • F. None of above. chosen
  • G. Unsure - the case is ambiguous/there is not enough information to decide.
NEDg Description generation gpt-5.1
Instruction
Generate a one-sentence description of the target entity. 
You are given a context triple in the form (subject, predicate, object), where the object is the target entity. 
# Instructions
Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. 
Avoid repeating the information from the triple, unless really essential.
# Response Format
Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: Yale Patt
Triple: [ACM-IEEE Eckert-Mauchly Award, notableRecipient, Yale Patt]
Generated description
Yale Patt is an American computer engineer and professor renowned for his pioneering contributions to microprocessor architecture and instruction-level parallelism.
NED2 Entity disambiguation (via description) gpt-5-mini-2025-08-07
Target entity: Yale Patt
Target entity description: Yale Patt is an American computer engineer and professor renowned for his pioneering contributions to microprocessor architecture and instruction-level parallelism.
  • A. David A. Patterson
    David A. Patterson is a pioneering American computer scientist best known for his work on RISC architecture, RAID storage, and influential computer architecture textbooks.
  • B. Norman P. Jouppi
    Norman P. Jouppi is a prominent computer architect known for his influential work in processor and memory system design, including leadership roles in industry and contributions to advanced CPU technologies.
  • C. John Cocke
    John Cocke was an influential American computer scientist and IBM researcher, often called the "father of RISC architecture" for his pioneering work in reduced instruction set computing and compiler optimization.
  • D. John L. Hennessy
    John L. Hennessy is an American computer scientist and academic leader, former president of Stanford University, and a pioneer in RISC processor architecture.
  • E. Federico Faggin
    Federico Faggin is an Italian-American physicist, engineer, and inventor best known for leading the development of the first commercial microprocessor and pioneering work in semiconductor technology.
  • F. None of above. chosen

Provenance (5 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69ca82ae2d1081909dbfee42b41db419 completed March 30, 2026, 2:03 p.m.
NER Named-entity recognition batch_69cb3ef68c6081908727d17238b3522a completed March 31, 2026, 3:26 a.m.
NED1 Entity disambiguation (via context triple) batch_69cd946a5e188190b2ef0a07a885ade7 completed April 1, 2026, 9:55 p.m.
NEDg Description generation batch_69cda342c10881908ebafc7853815424 completed April 1, 2026, 10:59 p.m.
NED2 Entity disambiguation (via description) batch_69cdab736f208190a90bd4344b21a22c completed April 1, 2026, 11:34 p.m.
Created at: March 30, 2026, 5:22 p.m.