Triple

T73264
Position Surface form Disambiguated ID Type / Status
Subject IEEE 1149.1 JTAG boundary-scan standard E1466 entity
Predicate relatedStandard P37 FINISHED
Object IEEE 1149.6
IEEE 1149.6 is a boundary-scan test standard that extends JTAG to support structural testing of high-speed AC-coupled and differential digital interconnects on printed circuit boards.
E9591 NE FINISHED

How this triple was built (4 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: IEEE 1149.6 | Statement: [IEEE 1149.1 JTAG boundary-scan standard, relatedStandard, IEEE 1149.6]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07
Target entity: IEEE 1149.6
Context triple: [IEEE 1149.1 JTAG boundary-scan standard, relatedStandard, IEEE 1149.6]
  • A. IEEE 1149.1 JTAG boundary‑scan standard
    The IEEE 1149.1 JTAG boundary-scan standard is a widely used test and debug specification that defines a serial interface and architecture for accessing and testing the internal logic and interconnects of integrated circuits and circuit boards.
  • B. IEEE 1532
    IEEE 1532 is an extension of the JTAG boundary-scan standard that defines in-system programming and configuration procedures for programmable devices such as FPGAs and CPLDs.
  • C. IEEE 488 GPIB standard
    The IEEE 488 GPIB standard is a widely used digital interface specification that enables communication and control among electronic test and measurement instruments and computers.
  • D. ITU-T G.8265.1
    ITU-T G.8265.1 is an international telecommunications standard that specifies the use of packet-based timing protocols over IP networks to distribute frequency synchronization, particularly for mobile and packet-based services.
  • E. IEEE Transactions on Very Large Scale Integration (VLSI) Systems
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems is a peer-reviewed scholarly journal focusing on the design, analysis, and implementation of VLSI and integrated systems.
  • F. None of above. chosen
  • G. Unsure - the case is ambiguous/there is not enough information to decide.
NEDg Description generation gpt-5.1
Instruction
Generate a one-sentence description of the target entity. 
You are given a context triple in the form (subject, predicate, object), where the object is the target entity. 
# Instructions
Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. 
Avoid repeating the information from the triple, unless really essential.
# Response Format
Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: IEEE 1149.6
Triple: [IEEE 1149.1 JTAG boundary-scan standard, relatedStandard, IEEE 1149.6]
Generated description
IEEE 1149.6 is a boundary-scan test standard that extends JTAG to support structural testing of high-speed AC-coupled and differential digital interconnects on printed circuit boards.
NED2 Entity disambiguation (via description) gpt-5-mini-2025-08-07
Target entity: IEEE 1149.6
Target entity description: IEEE 1149.6 is a boundary-scan test standard that extends JTAG to support structural testing of high-speed AC-coupled and differential digital interconnects on printed circuit boards.
  • A. IEEE 1149.1 JTAG boundary‑scan standard
    The IEEE 1149.1 JTAG boundary-scan standard is a widely used test and debug specification that defines a serial interface and architecture for accessing and testing the internal logic and interconnects of integrated circuits and circuit boards.
  • B. IEEE 1532
    IEEE 1532 is an extension of the JTAG boundary-scan standard that defines in-system programming and configuration procedures for programmable devices such as FPGAs and CPLDs.
  • C. IEEE 488 GPIB standard
    The IEEE 488 GPIB standard is a widely used digital interface specification that enables communication and control among electronic test and measurement instruments and computers.
  • D. ITU-T G.8265.1
    ITU-T G.8265.1 is an international telecommunications standard that specifies the use of packet-based timing protocols over IP networks to distribute frequency synchronization, particularly for mobile and packet-based services.
  • E. IEEE Transactions on Very Large Scale Integration (VLSI) Systems
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems is a peer-reviewed scholarly journal focusing on the design, analysis, and implementation of VLSI and integrated systems.
  • F. None of above. chosen

Provenance (5 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69a24c06b3bc8190aa4ac89026115efc completed Feb. 28, 2026, 1:59 a.m.
NER Named-entity recognition batch_69a2567b592c8190aaf692a18fcd2f1b completed Feb. 28, 2026, 2:44 a.m.
NED1 Entity disambiguation (via context triple) batch_69a26c1b81a88190ba473b28dd88fdb8 completed Feb. 28, 2026, 4:16 a.m.
NEDg Description generation batch_69a26d3eee308190a591a8b71fc3aea9 completed Feb. 28, 2026, 4:21 a.m.
NED2 Entity disambiguation (via description) batch_69a26d9fb7248190b358c6f890eac0e9 completed Feb. 28, 2026, 4:22 a.m.
Created at: Feb. 28, 2026, 2:03 a.m.