Triple
T35529173
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Widlar bandgap reference |
E1026751
|
entity |
| Predicate | instanceOf |
P0
|
FINISHED |
| Object | voltage reference circuit |
C13831
|
CONCEPT FINISHED |
How this triple was built (1 step)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
CD
Concept disambiguation
gpt-5-mini-2025-08-07
Target class: voltage reference circuit Context triple: [Widlar bandgap reference, instanceOf, voltage reference circuit]
-
A.
voltage standard
A voltage standard is a precise reference device or system that maintains a stable, known voltage used to calibrate and verify the accuracy of electrical measurement instruments.
-
B.
rectifier circuit
A rectifier circuit is an electronic configuration that converts alternating current (AC) into direct current (DC), typically using diodes to allow current flow in only one direction.
-
C.
equivalent circuit model
An equivalent circuit model is a simplified representation of an electrical network that uses idealized components (such as resistors, capacitors, and inductors) arranged to replicate the behavior of a more complex or real-world system.
-
D.
devotional circuit
A devotional circuit is a structured sequence of sacred sites, rituals, or practices that devotees follow to cultivate spiritual connection, discipline, and reverence.
-
E.
analog integrated circuit
chosen
An analog integrated circuit is an electronic device that processes continuous-time, continuously variable signals using interconnected analog components such as amplifiers, resistors, capacitors, and transistors on a single semiconductor chip.
- F. None of above.
Provenance (1 batch)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69f76dff7e508190b28ceeee770dce23 |
completed | May 3, 2026, 3:47 p.m. |
Created at: May 3, 2026, 4:04 p.m.