Triple

T29035566
Position Surface form Disambiguated ID Type / Status
Subject Yamaha YM2203 E737848 entity
Predicate controlBusWidth P4121 FINISHED
Object 8-bit LITERAL FINISHED

How this triple was built (2 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: 8-bit | Statement: [Yamaha YM2203, controlBusWidth, 8-bit]
PD Predicate disambiguation gpt-5-mini-2025-08-07
Target predicate: controlBusWidth
Context triple: [Yamaha YM2203, controlBusWidth, 8-bit]
  • A. memoryBusWidthBits
    Indicates the width, in bits, of the data path used by the memory bus to transfer information.
  • B. supportsMemoryBusWidth
    Indicates that one entity is compatible with or able to operate using the specified memory bus width of another entity.
  • C. nuBusSlotsCount
    Indicates the number of bus slots associated with or available on a given entity.
  • D. bitWidth chosen
    Indicates the number of bits used to represent or encode a given value, type, or data element.
  • E. busWidthComparedToISA
    Indicates how the width of a bus compares to the width defined by a given instruction set architecture (ISA), such as being wider, narrower, or equal.
  • F. None of above.

Provenance (3 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69f077efb3848190b41574e1670f6ae2 completed April 28, 2026, 9:03 a.m.
NER Named-entity recognition batch_69fbc36ce1f88190a7fa1656b714e107 completed May 6, 2026, 10:40 p.m.
PD Predicate disambiguation batch_69fbbd13595c81908719f52c3d37a7e8 completed May 6, 2026, 10:13 p.m.
Created at: April 28, 2026, 9:58 a.m.