Triple
T18704571
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | SiFive |
E457337
|
entity |
| Predicate | notableProductFamily |
P11218
|
FINISHED |
| Object | SiFive Essential |
—
|
NE NERFINISHED |
How this triple was built (3 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: SiFive Essential | Statement: [SiFive, notableProductFamily, SiFive Essential]
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: SiFive Essential Context triple: [SiFive, notableProductFamily, SiFive Essential]
-
A.
SiFive
SiFive is a semiconductor company known for designing customizable RISC‑V processor cores and platforms used in a wide range of computing applications.
-
B.
RISC-V
RISC-V is an open, extensible instruction set architecture (ISA) based on the reduced instruction set computing (RISC) principles, widely used for research, embedded systems, and increasingly general-purpose computing.
-
C.
Tensilica
Tensilica is a semiconductor IP company best known for its configurable Xtensa processor cores used in embedded and SoC designs.
-
D.
Artix FPGA family
The Artix FPGA family is a series of low-cost, low-power field-programmable gate arrays from Xilinx designed for high-performance, cost-sensitive applications such as communications, industrial, and consumer electronics.
-
E.
Calliope mini
Calliope mini is a small educational microcontroller board designed to teach children and beginners programming and electronics through interactive projects.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: SiFive Essential Target entity description: SiFive Essential is a family of RISC‑V processor IP cores designed for efficient, scalable embedded and edge computing applications.
-
A.
SiFive
chosen
SiFive is a semiconductor company known for designing customizable RISC‑V processor cores and platforms used in a wide range of computing applications.
-
B.
RISC-V
RISC-V is an open, extensible instruction set architecture (ISA) based on the reduced instruction set computing (RISC) principles, widely used for research, embedded systems, and increasingly general-purpose computing.
-
C.
Tensilica
Tensilica is a semiconductor IP company best known for its configurable Xtensa processor cores used in embedded and SoC designs.
-
D.
Artix FPGA family
The Artix FPGA family is a series of low-cost, low-power field-programmable gate arrays from Xilinx designed for high-performance, cost-sensitive applications such as communications, industrial, and consumer electronics.
-
E.
Calliope mini
Calliope mini is a small educational microcontroller board designed to teach children and beginners programming and electronics through interactive projects.
- F. None of above.
Provenance (2 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69d8d392aad081909fe31aa03e6e97d1 |
completed | April 10, 2026, 10:40 a.m. |
| NER | Named-entity recognition | batch_69e5671665bc8190b9b4a4ce4ec5b2eb |
completed | April 19, 2026, 11:36 p.m. |
Created at: April 10, 2026, 11:49 a.m.