Triple
T1823930
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Vortec V8 |
E40607
|
entity |
| Predicate | instanceOf |
P0
|
FINISHED |
| Object | engine family |
C9154
|
CONCEPT FINISHED |
How this triple was built (1 step)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
CD
Concept disambiguation
gpt-5-mini-2025-08-07
Target class: engine family Context triple: [Vortec V8, instanceOf, engine family]
-
A.
APU family
APU family is a group of closely related auxiliary power units that share common design characteristics, components, and operational behaviors within an aircraft or vehicle power system.
-
B.
V12 engine
A V12 engine is a twelve-cylinder internal combustion engine with two banks of six cylinders arranged in a V configuration around a common crankshaft, providing smooth, high-power performance.
-
C.
Turbostar family
The Turbostar family is a series of regional diesel multiple unit trains designed for short- to medium-distance passenger services, known for their modular construction and widespread use in the UK rail network.
-
D.
system on a chip family
A system on a chip family is a group of closely related integrated circuits that share a common architecture and design philosophy, each combining multiple computing, memory, and peripheral components on a single chip for different performance, power, and feature needs.
-
E.
microprocessor family
A microprocessor family is a group of closely related microprocessors that share a common architecture, instruction set, and design philosophy, enabling software and hardware compatibility across multiple processor models and generations.
- F. None of above. chosen
Provenance (1 batch)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69a8864644bc8190b2358ab897194ac1 |
completed | March 4, 2026, 7:21 p.m. |
Created at: March 4, 2026, 7:32 p.m.