Triple
T13320140
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Sempron |
E317292
|
entity |
| Predicate | competitor |
P1375
|
FINISHED |
| Object | Intel Celeron |
E31318
|
NE FINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: Intel Celeron | Statement: [Sempron, competitor, Intel Celeron]
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: Intel Celeron Context triple: [Sempron, competitor, Intel Celeron]
-
A.
Intel Celeron
chosen
Intel Celeron is a line of budget-oriented x86 microprocessors designed by Intel for entry-level desktop and laptop computers.
-
B.
Intel Core i3
Intel Core i3 is Intel’s entry-level line of consumer x86 processors designed to provide reliable everyday performance for budget desktops and laptops.
-
C.
Intel Pentium
Intel Pentium is a line of x86 microprocessors that became widely known in the 1990s for powering mainstream personal computers and marking a major step in consumer CPU performance.
-
D.
Intel Atom
Intel Atom is a line of low-power x86 microprocessors designed primarily for energy-efficient laptops, netbooks, and embedded devices.
-
E.
Intel Pentium D
Intel Pentium D is a line of dual-core desktop processors by Intel based on the NetBurst microarchitecture, designed to provide improved multitasking performance over earlier single-core Pentium 4 CPUs.
- F. None of above.
- G. Unsure - the case is ambiguous/there is not enough information to decide.
Provenance (3 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69d806b4d62c81908d4ced1665414be5 |
completed | April 9, 2026, 8:06 p.m. |
| NER | Named-entity recognition | batch_69d990faa95481908a7fd297959c062e |
completed | April 11, 2026, 12:08 a.m. |
| NED1 | Entity disambiguation (via context triple) | batch_69f716ee695c81909ffeeb0901ee66c1 |
completed | May 3, 2026, 9:35 a.m. |
Created at: April 9, 2026, 9:29 p.m.