Triple

T11958579
Position Surface form Disambiguated ID Type / Status
Subject GNU NYU Ada Translator E284612 entity
Predicate supportsTarget P5090 FINISHED
Object RISC-V E37329 NE FINISHED

How this triple was built (2 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: RISC-V | Statement: [GNU NYU Ada Translator, supportsTarget, RISC-V]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07
Target entity: RISC-V
Context triple: [GNU NYU Ada Translator, supportsTarget, RISC-V]
  • A. RISC-V chosen
    RISC-V is an open, extensible instruction set architecture (ISA) based on the reduced instruction set computing (RISC) principles, widely used for research, embedded systems, and increasingly general-purpose computing.
  • B. RISC-V International
    RISC-V International is the global nonprofit consortium that oversees the development, standardization, and promotion of the open RISC-V instruction set architecture.
  • C. SiFive
    SiFive is a semiconductor company known for designing customizable RISC‑V processor cores and platforms used in a wide range of computing applications.
  • D. Spike RISC-V ISA simulator
    Spike RISC-V ISA simulator is the official reference software simulator for the RISC-V instruction set architecture, used to validate and test RISC-V implementations.
  • E. RISC
    RISC is an Austrian research institute specializing in symbolic computation, computer algebra, and related areas of mathematics and computer science.
  • F. None of above.
  • G. Unsure - the case is ambiguous/there is not enough information to decide.

Provenance (3 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69d6ab2db38c8190b1f0ed6663ef8ada completed April 8, 2026, 7:23 p.m.
NER Named-entity recognition batch_69d903681a00819098c2b5260e2ef834 completed April 10, 2026, 2:04 p.m.
NED1 Entity disambiguation (via context triple) batch_69f459210d1c8190953cd01da3d2ad04 completed May 1, 2026, 7:41 a.m.
Created at: April 8, 2026, 9:45 p.m.