Triple
T10098157
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Warwick Business School |
E215926
|
entity |
| Predicate | accreditation |
P117
|
FINISHED |
| Object | AMBA |
E3324
|
NE FINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: AMBA | Statement: [Warwick Business School, accreditation, AMBA]
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: AMBA Context triple: [Warwick Business School, accreditation, AMBA]
-
A.
AMBA
chosen
AMBA (the Association of MBAs) is a leading international accreditation body that evaluates and endorses the quality of postgraduate business education programs worldwide.
-
B.
Element Interconnect Bus
The Element Interconnect Bus is a high-speed internal communication network in the Cell Broadband Engine architecture that links its processing elements and memory controllers to enable efficient parallel data transfer.
-
C.
UNIBUS
UNIBUS is a pioneering computer bus architecture developed for Digital Equipment Corporation’s PDP series that unified memory and peripheral communications on a single shared system bus.
-
D.
Multibus
Multibus is an early Intel-developed computer bus standard widely used in 1980s workstations and embedded systems for modular expansion and peripheral connectivity.
-
E.
ARM
ARM is a family of energy-efficient RISC processor architectures widely used in mobile devices, embedded systems, and increasingly in laptops and servers.
- F. None of above.
- G. Unsure - the case is ambiguous/there is not enough information to decide.
Provenance (3 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69ca83a4947c8190823a7495dc5d96ed |
completed | March 30, 2026, 2:07 p.m. |
| NER | Named-entity recognition | batch_69cdd07c0e248190b4ab450e0b83ea0c |
completed | April 2, 2026, 2:12 a.m. |
| NED1 | Entity disambiguation (via context triple) | batch_69d2b6c218b08190853b0979296e2f83 |
completed | April 5, 2026, 7:23 p.m. |
Created at: March 30, 2026, 9:02 p.m.