MIPS R2000

E819631

The MIPS R2000 is an early 32-bit RISC microprocessor that helped popularize the MIPS architecture in academic and commercial systems during the late 1980s.

All labels observed (2)

Label Occurrences
MIPS R2000 canonical 1
MIPS R2000 family 1

How this entity was disambiguated

Statements (46)

Predicate Object
instanceOf microprocessor
addressSpace 32-bit
architecture MIPS I
branchDelaySlots 1
cacheSupport external instruction and data caches
clockFrequencyRange 8 MHz to 16 MHz
commercialAvailabilityYear 1986
coprocessorInterfaceCount 4
designStyle load-store architecture
family MIPS R-series
floatingPointCoprocessor MIPS R2010
influenced RISC processor education
later MIPS processor designs
instructionSetType reduced instruction set computing
integerRegisterWidth 32-bit
introducedBy MIPS Computer Systems
introducedInYear 1985
marketPosition early commercial RISC CPU
MMUImplementation in coprocessor 0
notability helped popularize the MIPS architecture in academia and industry
notableSystemUsage DECstation workstations
linked to: DECstation

MIPS Magnum workstations
onChipCache no
pipelineStages 5
pipelineType scalar pipeline
registerFileSize 32 general-purpose registers
successor MIPS R3000
supportsBigEndian yes
supportsCoprocessor CP0
CP1
CP2
CP3
supportsFloatingPointVia MIPS R2010
supportsHardwareDivide yes
supportsHardwareMultiply yes
supportsLittleEndian no
supportsMultiplyDivideUnit yes
supportsVirtualAddressTranslation yes
technologyNode 1.5 µm CMOS (typical implementations)
transistorCountApproximate 115000
usedIn embedded systems
servers
workstations
usesDelayedBranches yes
virtualMemorySupport yes
wordSize 32-bit

How these facts were elicited

Referenced by (2)

Full triples — surface form annotated when it differs from this entity's canonical label.

MC88100 competition MIPS R2000
Ivory microprocessor concurrentWith MIPS R2000 family
linked to: MIPS R2000