KA10

E817470

KA10 was the original 36-bit processor model used in Digital Equipment Corporation's early DECsystem-10 mainframe computers.

All labels observed (1)

Label Occurrences
KA10 canonical 2

How this entity was disambiguated

Statements (47)

Predicate Object
instanceOf DECsystem-10 processor
central processing unit
computer processor
addressingMode 36-bit word addressing
alsoKnownAs PDP-10 KA10 processor
linked to: PDP-10
architecture 36-bit architecture
bitWidth 36
category mainframe CPU
companyDivision DEC Large Computer Products
countryOfOrigin United States
dataPathWidth 36 bits
designedFor mainframe computers
time-sharing systems
family PDP-10
floatingPointFormat 36-bit floating point
implementation wire-wrapped backplanes
instructionSetArchitecture PDP-10 instruction set
instructionType CISC
introductionDate 1967
manufacturer Digital Equipment Corporation
marketedAs DECsystem-10 processor
notableInstallation Carnegie Mellon University
linked to: CMU

MIT
Stanford University
operatingSystem TENEX (on modified systems)
TOPS-10
partOf DECsystem-10 mainframe
linked to: DECsystem-10

PDP-10 line
linked to: PDP-10
primaryUse academic computing
research computing
time-sharing service bureaus
registerWidth 36 bits
role original processor for DECsystem-10
successor KI10
KL10
KS10
supports batch processing
floating-point operations
hardware divide
hardware multiply
time-sharing
technology discrete transistor logic
usedFor early ARPANET hosts
time-sharing operating system development
usedIn DECsystem-10
PDP-10 family
linked to: PDP-10
wordSize 36-bit

How these facts were elicited

Referenced by (2)

Full triples — surface form annotated when it differs from this entity's canonical label.

DECsystem-10 cpuFamily KA10
PDP-10 notableModel KA10