Rome

E658518

Rome is the codename for a generation of AMD EPYC server processors based on the Zen 2 microarchitecture, known for significant improvements in performance and efficiency over its predecessors.

All labels observed (1)

Label Occurrences
Rome canonical 2

How this entity was disambiguated

Statements (46)

Predicate Object
instanceOf AMD EPYC microarchitecture codename
server processor family
announced August 2019
architectureFamily x86-64
linked to: AMD64 architecture
basedOnMicroarchitecture Zen 2
chipletDesign true
codenameFor second-generation AMD EPYC processors
coreDieProcessNode 7 nm
ioDieProcessNode 12 nm
launchYear 2019
manufacturer AMD
Advanced Micro Devices
marketSegment data center
server
maxCoreCountPerCPU 64
maxMemoryChannelsPerSocket 8
maxPCIeLanesPerSocket 128
maxThreadCountPerCPU 128
memoryType DDR4
notableImprovementOverPredecessor higher core counts
higher memory bandwidth
improved performance per watt
more PCIe lanes
predecessor Naples
processNode 7 nm
processNodeSupplier TSMC
socket Socket SP3
successor Milan
supportsECCMemory true
supportsInstructionSet AES-NI
AVX2
linked to: Intel AVX2

FMA3
SHA
SSE4.2
x86-64
supportsMultiSocketConfiguration up to 2 sockets
supportsPCIeVersion PCIe 4.0
supportsSecurityFeature SEV-ES
SME
Secure Encrypted Virtualization
supportsVirtualization AMD-V
AMD-Vi
targetUseCases cloud computing
enterprise servers
high-performance computing
virtualization

How these facts were elicited

Referenced by (2)

Full triples — surface form annotated when it differs from this entity's canonical label.

AMD EPYC codename Rome
Zen setting Rome