Bonnell
E163305
Bonnell is the microarchitecture that underpinned Intel's first-generation Atom processors, designed for low-power, energy-efficient computing in mobile and embedded devices.
All labels observed (1)
| Label | Occurrences |
|---|---|
| Bonnell canonical | 1 |
How this entity was disambiguated
This entity first appeared as the object of triple T1429484 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: Bonnell Context triple: [Intel Atom, codenameOfFirstGeneration, Bonnell]
-
A.
Barlow
Barlow is a surname most notably associated with John Perry Barlow, the American poet, essayist, and co-founder of the Electronic Frontier Foundation.
-
B.
Bardeen
Bardeen is a surname most notably associated with John Bardeen, the American physicist who won the Nobel Prize in Physics twice for his work on the transistor and superconductivity.
-
C.
Lyness
Lyness is a small coastal village and former naval base on the island of Hoy in Orkney, Scotland.
-
D.
Cassin
Cassin is a French surname most notably borne by René Cassin, a Nobel Peace Prize–winning jurist and co-author of the Universal Declaration of Human Rights.
-
E.
Bowen
Bowen is a surname of English and Welsh origin borne by various notable individuals across fields such as science, politics, and the arts.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: Bonnell Target entity description: Bonnell is the microarchitecture that underpinned Intel's first-generation Atom processors, designed for low-power, energy-efficient computing in mobile and embedded devices.
-
A.
Barlow
Barlow is a surname most notably associated with John Perry Barlow, the American poet, essayist, and co-founder of the Electronic Frontier Foundation.
-
B.
Bardeen
Bardeen is a surname most notably associated with John Bardeen, the American physicist who won the Nobel Prize in Physics twice for his work on the transistor and superconductivity.
-
C.
Lyness
Lyness is a small coastal village and former naval base on the island of Hoy in Orkney, Scotland.
-
D.
Cassin
Cassin is a French surname most notably borne by René Cassin, a Nobel Peace Prize–winning jurist and co-author of the Universal Declaration of Human Rights.
-
E.
Bowen
Bowen is a surname of English and Welsh origin borne by various notable individuals across fields such as science, politics, and the arts.
- F. None of above. chosen
Statements (48)
| Predicate | Object |
|---|---|
| instanceOf | microarchitecture ⓘ |
| branchPrediction |
branch target buffer
ⓘ
static and dynamic branch prediction ⓘ |
| brandAssociation | Intel Atom ⓘ |
| cacheHierarchy |
L1 data cache
ⓘ
L1 instruction cache ⓘ L2 cache ⓘ |
| cacheWritePolicy | write-back L1 data cache ⓘ |
| coreCount |
dual-core configurations
ⓘ
single-core configurations ⓘ |
| designedFor |
always-on internet devices
ⓘ
small form factor PCs ⓘ |
| designGoal |
energy efficiency
ⓘ
low power consumption ⓘ |
| developer |
Intel Corporation
ⓘ
surface form:
Intel
|
| executionWidth | 2-way issue ⓘ |
| family | Intel low-power x86 cores ⓘ |
| firstProducts |
Intel Atom
ⓘ
surface form:
Intel Atom N2xx series
Intel Atom ⓘ
surface form:
Intel Atom Z5xx series
|
| floatingPointUnit | x87 FPU ⓘ |
| generation | first-generation Intel Atom ⓘ |
| instructionSetArchitecture | x86 ⓘ |
| introducedBy | Intel in 2008 ⓘ |
| marketSegment |
embedded systems
ⓘ
low-power desktops ⓘ netbooks ⓘ |
| microarchitectureType | in-order execution ⓘ |
| optimizedFor | low thermal design power ⓘ |
| pipelineDepth | 16 stages ⓘ |
| pipelineType | dual-issue ⓘ |
| powerOptimization |
clock gating
ⓘ
power gating ⓘ |
| processTechnology | 45 nm ⓘ |
| successor | Saltwell ⓘ |
| supports |
CMPXCHG16B (model-dependent)
ⓘ
Intel SpeedStep ⓘ
surface form:
Enhanced Intel SpeedStep Technology
Intel Hyper-Threading Technology ⓘ
surface form:
Hyper-Threading Technology
IA-32 ⓘ Intel 64 ⓘ MONITOR/MWAIT ⓘ PCLMULQDQ (not supported) ⓘ SSE3 ⓘ SSSE3 ⓘ XD bit (Execute Disable Bit) ⓘ hardware virtualization (limited, model-dependent) ⓘ |
| targetApplication |
embedded devices
ⓘ
mobile devices ⓘ |
| usedIn |
Intel Atom
ⓘ
surface form:
Intel Atom processors
|
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
Instruction
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Input
Subject: Bonnell Description of subject: Bonnell is the microarchitecture that underpinned Intel's first-generation Atom processors, designed for low-power, energy-efficient computing in mobile and embedded devices.
Referenced by (1)
Full triples — surface form annotated when it differs from this entity's canonical label.