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gptkbp:instance_of
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gptkb:microprocessor
|
|
gptkbp:bfsLayer
|
5
|
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gptkbp:bfsParent
|
gptkb:Code_Composer_Studio
|
|
gptkbp:application
|
Real-time systems
|
|
gptkbp:architectural_style
|
gptkb:architect
|
|
gptkbp:availability
|
Widely available
|
|
gptkbp:cache_size
|
Instruction cache
Data cache
|
|
gptkbp:design
|
gptkb:Reliability
Safety
Availability
|
|
gptkbp:designed_by
|
gptkb:CEO
|
|
gptkbp:developer
|
gptkb:ARM_Development_Studio
gptkb:Keil_MDK
gptkb:IAR_Embedded_Workbench
|
|
gptkbp:features
|
Low-latency interrupt handling
Error correction code (ECC)
Memory protection unit (MPU)
Support for dual-core configurations
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|
https://www.w3.org/2000/01/rdf-schema#label
|
Cortex-R processors
|
|
gptkbp:introduced
|
gptkb:2005
|
|
gptkbp:is_compatible_with
|
Backward compatible with previous ARM architectures
|
|
gptkbp:language_of_instruction
|
AR Mv8-R
AR Mv7-R
|
|
gptkbp:market_segment
|
Automotive market
Consumer market
Industrial market
Embedded market
Medical market
|
|
gptkbp:performance
|
gptkb:Core_Mark
High performance
Dhrystone MIPS
|
|
gptkbp:power_consumption
|
Low power consumption
|
|
gptkbp:project
|
Production
|
|
gptkbp:ram
|
gptkb:Magic:_The_Gathering_set
gptkb:CEO
DDR memory
|
|
gptkbp:security_features
|
gptkb:Trust_Zone_technology
Secure boot
Cryptographic acceleration
|
|
gptkbp:successor
|
gptkb:Cortex-R5
gptkb:Cortex-R8
gptkb:Cortex-R52
gptkb:Cortex-R53
gptkb:Cortex-R7
gptkb:Cortex-R72
|
|
gptkbp:supports
|
Embedded systems
Safety-critical applications
Real-time operating systems (RTOS)
|
|
gptkbp:used_in
|
Consumer electronics
Industrial control systems
Medical devices
Automotive applications
|